Big Caching Changes Come in Small Packages: MRAM

Storage issues like the escalating amount of data—structured and unstructured—that is coming out and overwhelming businesses have prompted creative solutions by industry vendors. Many of these solutions have involved a complete system overhaul—creating new architecture and new data storage management systems.

Sometimes, the answer to a problem may not lie in the big picture but rather in the details. This approach is how Everspin views the possible applications that their most recent MRAM chip.

MRAM stands for magneto-resistive random access memory, and the technology can replace standard DRAM for write caching operations as it is 10,000 times faster than NAND flash.  Everspin Technologies is seeking a way to evolve DRAM chips and Flash memory chips by combining the features into a single chip. Everspin’s MRAM offers greater densities and requires about 50% less power than comparable options on the market. This combination works as the MRAM performs at the same speed as DRAM with the same functions as Flash memory chips.

MRAM Architecture - Big Caching Changes Come in Small Packages - YourDailyTech
MRAM Architecture

The newest chip that they have released, the 256MB chip, uses spin torque (ST-MRAM) that changes data from ones to zeroes by utilizing a tiny voltage to flip them up or down in Everspin’s architecture that stacks chips in a vertical plane. It increases the cell density and then MRAM can act as persistent memory in storage devices and servers that operates on DDR3 and DDR4 interfaces.

ST-MRAM would replace write caching, something that is typically made up of a small volume of extremely costly high-performance SRAM, some NAND Flash and a super capacitor that powers the SRAM online to translate the data to non-volatile memory. Since ST-MRAM works as a non-volatile memory, it would be able to write caching operations even if power is lost to the super capacitors.

This non-volatile memory is what allows ST-MRAM to act as a first tier of storage in a storage array or server because it will protect data that has not yet been stored on mass storage devices like NAND Flash or hard disks. Any data that is still in the processing of being copied can be protect even if power goes out in systems powered by the ST-MRAM.

As CEO Phillip LoPresti commented, “MRAM instantly secures data in flight without the concern of data corruption due to the unreliability of power sources.” He continued, “we [Everspin] created our family of DDR3-based spin torque parts to address enterprise-class storage appliances, RAID server-attached storage, and SSDs that get deployed in the enterprise.”

MRAM has several possible uses including computers, industrial equipment and Near Field Communication (NFC) technologies. The application possibilities are not just limited to storage arrays and storage systems.

Within enterprise data centers, however, MRAM can be used to reduce system downtime and simplify system design, which would lower overall costs. It would also eliminate the need for external elements like resistors, capacitors, batteries, and super-capacitors, which also improves the reliability of the system and further decrease costs.

A few systems have already begun to incorporate the new ST-MRAM chip including IBM’s ConTutto platform in a Power8 system. At the recent OpenPOWER summit, a presentation proved that Everspin’s DDR3 ST-MRAM operates well as persistent memory that accelerates storage and server applications.

The MRAM is still more expensive than other well-established storage technologies, but the performance has proven to be significantly better. As the technology continues to evolve, including Everspin’s own release of a 1 gigabit chip planned for later this year, the applications of the MRAM will continue to grow and develop.

Competitors for Everspin include Avalanche Technology  who is still sampling Spin Transfer Torque Magnetic RAM (SST-MRAM) in 32 or 64 Mbit discrete memory devices that have industry standard SPI interfaces. The other main competitor is Crocus, who is another MRAM chip company, that is building a multi-bit per-cell solution based in its Magnetic Logic Unit (MLU) technology.

All of the focus in the possibility of changing write caching means that futuristic solutions may be in smaller details than ever imagined.

Lindsey Cobb

Lindsey Cobb, a Georgia native and former history major, is a technology researcher who is fascinated by past and future of technology. When she is not engrossed in the prophecy of science fiction stories, Lindsey is likely to be planning her next adventurous trip or petting every dog she meets. Contact Lindsey at [email protected]